Mengejar Mimpi

Practical Architecture for Low Power Analog-to-Digital Converter (ADC).

Im designing a 8-bit folding-interpolating ADC for my final year project (FYP). The most common architecture for folding ADC is combined with interpolator and sometime refer to folding and interpolating ADC. The first three most significant bit (MSB) is realized by 3-bit flash ADC. Meanwhile, another five bits is realized using folding and interpolating circuit. In designing an ADC, the accuracy of the ADC is the most important thing that have to be considered while maintaining the conversion speed. Therefore, designing the folding-interpolating circuit is going to be the hardest parts in this project. You might found the following problems when designing a folding ADC.

1. The folder output shifted and amplified/attenuated when try to interpolate the signal.

2. The sine signal of folder output is asymmetrical.

3. The DC level of the sine signal of folder output increase as input voltage increase.